rsc | 0a61c07 | 2004-04-19 18:18:37 +0000 | [diff] [blame] | 1 | // 68020 support |
| 2 | |
| 3 | defn acidinit() // Called after all the init modules are loaded |
| 4 | { |
| 5 | bplist = {}; |
| 6 | bpfmt = 'x'; |
| 7 | |
| 8 | srcpath = { |
| 9 | "./", |
| 10 | "/sys/src/libc/port/", |
| 11 | "/sys/src/libc/9sys/", |
| 12 | "/sys/src/libc/68020/" |
| 13 | }; |
| 14 | |
| 15 | srcfiles = {}; // list of loaded files |
| 16 | srctext = {}; // the text of the files |
| 17 | } |
| 18 | |
| 19 | defn linkreg(addr) |
| 20 | { |
| 21 | return 0; |
| 22 | } |
| 23 | |
| 24 | defn stk() // trace |
| 25 | { |
| 26 | _stk(*PC, *A7, 0, 0); |
| 27 | } |
| 28 | |
| 29 | defn lstk() // trace with locals |
| 30 | { |
| 31 | _stk(*PC, *A7, 0, 1); |
| 32 | } |
| 33 | |
| 34 | defn gpr() // print general purpose registers |
| 35 | { |
| 36 | print("R0\t", *R0, "R1\t", *R1, "R2\t", *R2, "R3\t", *R3, "\n"); |
| 37 | print("R4\t", *R4, "R5\t", *R5, "R6\t", *R6, "R7\t", *R7, "\n"); |
| 38 | print("A0\t", *A0, "A1\t", *A1, "A2\t", *A2, "A3\t", *A3, "\n"); |
| 39 | print("A4\t", *A4, "A5\t", *A5, "A6\t", *A6, "A7\t", *A7, "\n"); |
| 40 | } |
| 41 | |
| 42 | defn spr() // print special processor registers |
| 43 | { |
| 44 | local pc; |
| 45 | local cause; |
| 46 | |
| 47 | pc = *PC; |
| 48 | print("PC\t", pc, " ", fmt(pc, 'a'), " "); |
| 49 | pfl(pc); |
| 50 | print("SP\t", *A7, " MAGIC\t", *MAGIC, "\n"); |
| 51 | |
| 52 | cause = *VO; |
| 53 | print("SR\t", *SR, "VO ", cause, " ", reason(cause), "\n"); |
| 54 | } |
| 55 | |
| 56 | defn regs() // print all registers |
| 57 | { |
| 58 | spr(); |
| 59 | gpr(); |
| 60 | } |
| 61 | |
| 62 | defn pstop(pid) |
| 63 | { |
| 64 | local l; |
| 65 | local pc; |
| 66 | |
| 67 | pc = *PC; |
| 68 | |
| 69 | print(pid,": ", reason(*VO), "\t"); |
| 70 | print(fmt(pc, 'a'), "\t", fmt(pc, 'i'), "\n"); |
| 71 | |
| 72 | if notes then { |
| 73 | if notes[0] != "sys: breakpoint" then { |
| 74 | print("Notes pending:\n"); |
| 75 | l = notes; |
| 76 | while l do { |
| 77 | print("\t", head l, "\n"); |
| 78 | l = tail l; |
| 79 | } |
| 80 | } |
| 81 | } |
| 82 | } |
| 83 | |
| 84 | aggr Ureg |
| 85 | { |
| 86 | 'U' 0 r0; |
| 87 | 'U' 4 r1; |
| 88 | 'U' 8 r2; |
| 89 | 'U' 12 r3; |
| 90 | 'U' 16 r4; |
| 91 | 'U' 20 r5; |
| 92 | 'U' 24 r6; |
| 93 | 'U' 28 r7; |
| 94 | 'U' 32 a0; |
| 95 | 'U' 36 a1; |
| 96 | 'U' 40 a2; |
| 97 | 'U' 44 a3; |
| 98 | 'U' 48 a4; |
| 99 | 'U' 52 a5; |
| 100 | 'U' 56 a6; |
| 101 | 'U' 60 sp; |
| 102 | 'U' 64 usp; |
| 103 | 'U' 68 magic; |
| 104 | 'u' 72 sr; |
| 105 | 'U' 74 pc; |
| 106 | 'u' 78 vo; |
| 107 | 'a' 80 microstate; |
| 108 | }; |
| 109 | |
| 110 | defn |
| 111 | Ureg(addr) { |
| 112 | complex Ureg addr; |
| 113 | print(" r0 ", addr.r0, "\n"); |
| 114 | print(" r1 ", addr.r1, "\n"); |
| 115 | print(" r2 ", addr.r2, "\n"); |
| 116 | print(" r3 ", addr.r3, "\n"); |
| 117 | print(" r4 ", addr.r4, "\n"); |
| 118 | print(" r5 ", addr.r5, "\n"); |
| 119 | print(" r6 ", addr.r6, "\n"); |
| 120 | print(" r7 ", addr.r7, "\n"); |
| 121 | print(" a0 ", addr.a0, "\n"); |
| 122 | print(" a1 ", addr.a1, "\n"); |
| 123 | print(" a2 ", addr.a2, "\n"); |
| 124 | print(" a3 ", addr.a3, "\n"); |
| 125 | print(" a4 ", addr.a4, "\n"); |
| 126 | print(" a5 ", addr.a5, "\n"); |
| 127 | print(" a6 ", addr.a6, "\n"); |
| 128 | print(" sp ", addr.sp, "\n"); |
| 129 | print(" usp ", addr.usp, "\n"); |
| 130 | print(" magic ", addr.magic, "\n"); |
| 131 | print(" sr ", addr.sr, "\n"); |
| 132 | print(" pc ", addr.pc, "\n"); |
| 133 | print(" vo ", addr.vo, "\n"); |
| 134 | print(" microstate ", addr.microstate, "\n"); |
| 135 | }; |
| 136 | |
| 137 | print(acidfile); |